+#include <asm/kregs.h>
#include "xg_private.h"
#include "xenguest.h"
#include "xc_private.h"
free(image);
ctxt->regs.ip = 0x80000000ffffffb0UL;
+ ctxt->regs.ar.fpsr = xc_ia64_fpsr_default();
+ ctxt->regs.cr.isr = 1UL << 63;
+ ctxt->regs.psr = IA64_PSR_AC | IA64_PSR_BN;
+ ctxt->regs.cr.dcr = 0;
+ ctxt->regs.cr.pta = 15 << 2;
memset(&launch_domctl, 0, sizeof(launch_domctl));
fprintf(stderr, "ip=%016lx, b0=%016lx\n", ctxt.regs.ip, ctxt.regs.b[0]);
- /* First to initialize. */
- domctl.cmd = XEN_DOMCTL_setvcpucontext;
- domctl.domain = (domid_t)dom;
- domctl.u.vcpucontext.vcpu = 0;
- set_xen_guest_handle(domctl.u.vcpucontext.ctxt, &ctxt);
- if (xc_domctl(xc_handle, &domctl) != 0) {
- ERROR("Couldn't set vcpu context");
- goto out;
- }
-
- /* Second to set registers... */
+ /* Initialize and set registers. */
ctxt.flags = VGCF_EXTRA_REGS;
domctl.cmd = XEN_DOMCTL_setvcpucontext;
domctl.domain = (domid_t)dom;
#include <string.h>
#include <inttypes.h>
#include <assert.h>
+#include <asm/kregs.h>
#include <xen/xen.h>
#include <xen/foreign/ia64.h>
memset(ctxt, 0, sizeof(*ctxt));
ctxt->flags = 0;
- ctxt->regs.psr = 0; /* all necessary bits filled by hypervisor */
+ /* PSR is set according to SAL 3.2.4: AC, IC and BN are set. */
+ ctxt->regs.psr = IA64_PSR_AC | IA64_PSR_IC | IA64_PSR_BN;
ctxt->regs.ip = dom->parms.virt_entry;
- ctxt->regs.cfm = (uint64_t) 1 << 63;
+ ctxt->regs.cfm = 1UL << 63;
#ifdef __ia64__ /* FIXME */
ctxt->regs.ar.fpsr = xc_ia64_fpsr_default();
#endif
test_bit(_VPF_down, &targ->pause_flags)) {
struct pt_regs *targ_regs = vcpu_regs(targ);
- struct vcpu_guest_context c;
- memset (&c, 0, sizeof(c));
-
- if (arch_set_info_guest(targ, &c) != 0) {
+ if (arch_set_info_guest(targ, NULL) != 0) {
printk("arch_boot_vcpu: failure\n");
return;
}
c.nat->regs.r[10] = uregs->r10;
c.nat->regs.r[11] = uregs->r11;
- if (is_hvm) {
- c.nat->regs.psr = vmx_vcpu_get_psr (v);
- } else {
- /* FIXME: get the vpsr. */
- c.nat->regs.psr = uregs->cr_ipsr;
- }
+ if (is_hvm)
+ c.nat->regs.psr = vmx_vcpu_get_psr(v);
+ else
+ c.nat->regs.psr = vcpu_get_psr(v);
c.nat->regs.ip = uregs->cr_iip;
c.nat->regs.cfm = uregs->cr_ifs;
struct domain *d = v->domain;
int rc;
+ /* Finish vcpu initialization. */
+ if (!v->is_initialised) {
+ if (d->arch.is_vti)
+ rc = vmx_final_setup_guest(v);
+ else
+ rc = vcpu_late_initialise(v);
+ if (rc != 0)
+ return rc;
+
+ vcpu_init_regs(v);
+
+ v->is_initialised = 1;
+ /* Auto-online VCPU0 when it is initialised. */
+ if (v->vcpu_id == 0)
+ clear_bit(_VPF_down, &v->pause_flags);
+ }
+
+ if (c.nat == NULL)
+ return 0;
+
uregs->b6 = c.nat->regs.b[6];
uregs->b7 = c.nat->regs.b[7];
uregs->r9 = c.nat->regs.r[9];
uregs->r10 = c.nat->regs.r[10];
uregs->r11 = c.nat->regs.r[11];
-
- uregs->cr_ipsr = c.nat->regs.psr;
+
+ if (!d->arch.is_vti)
+ vcpu_set_psr(v, c.nat->regs.psr);
+ else
+ vmx_vcpu_set_psr(v, c.nat->regs.psr);
uregs->cr_iip = c.nat->regs.ip;
uregs->cr_ifs = c.nat->regs.cfm;
v->arch.iva = c.nat->regs.cr.iva;
}
- if (v->is_initialised)
- return 0;
-
- if (d->arch.is_vti) {
- rc = vmx_final_setup_guest(v);
- if (rc != 0)
- return rc;
- } else {
- rc = vcpu_late_initialise(v);
- if (rc != 0)
- return rc;
- VCPU(v, interrupt_mask_addr) =
- (unsigned char *) d->arch.shared_info_va +
- INT_ENABLE_OFFSET(v);
- }
-
- /* This overrides some registers. */
- vcpu_init_regs(v);
-
- if (!v->is_initialised) {
- v->is_initialised = 1;
- /* Auto-online VCPU0 when it is initialised. */
- if (v->vcpu_id == 0)
- clear_bit(_VPF_down, &v->pause_flags);
- }
-
return 0;
}
/* First start: initialize vpcu. */
if (!targ->is_initialised) {
- struct vcpu_guest_context c;
-
- memset (&c, 0, sizeof (c));
-
- if (arch_set_info_guest (targ, &c) != 0) {
+ if (arch_set_info_guest (targ, NULL) != 0) {
printk ("arch_boot_vcpu: failure\n");
return;
}
INT_ENABLE_OFFSET(v);
VCPU(v, itv) = (1 << 16); /* timer vector masked */
- /* SAL specification 3.2.4 */
- VCPU(v, vpsr) = IA64_PSR_AC | IA64_PSR_IC | IA64_PSR_BN;
v->vcpu_info->evtchn_upcall_pending = 0;
v->vcpu_info->evtchn_upcall_mask = -1;
}